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Our Publications


A 100 MHz, 91:5% Peak Efficiency Integrated Buck Converter With a three-MOSFETs Cascode Bridge
F. Neveu, B. Allard, C. Martin, P. Bevilacqua, F. Voiron, IEEE Transaction on Power ...
2015-10-28 11:02:14
2.55 MB
Aerospace Performances of IPDiA -250°C up to 250°C Grade Silicon Capacitors
L. Lengignon (IPDiA), D. Lopez (Alter Technology), D. Lacombe (ESA/ESTEC)
2016-04-19 10:52:13
699.63 KB
Analysis of Ultra large band Wire bondable vertical Silicon Capacitors Performance in a GaN ...
O. Gaborieau, L. Lenoir, IMS 2015
2015-10-28 10:50:47
347.99 KB
Automotive Grade Silicon Capacitors for ‘Under the Hood’ Applications
S. Jacqueline, L. Lengignon, L. Omnès
2015-10-28 10:33:12
267.00 KB
Building smaller more reliable Medical Electonic devices
F. Murray, EMDT, 2011
2015-10-28 10:36:16
351.85 KB
Low profile 3D-IPD for Advanced Wafer Level Packaging
S. Bellenger, C. Bunel, F. Murray, Device Packaging Conf. 2011
2013-07-19 15:15:30
235.50 KB
Low Profile Integrated Passive Devices with 3D High Density Capacitors
C. Bunel, S. Borel, M. Pommier, S. Jacqueline, ESTC Conf. 2012
2013-05-15 10:05:42
688.99 KB
New Ultra Low ESR Mosaïc PICS Capacitors For Power Conversion
M. Jatlaoui, L. Fourneaud, F. Voiron, EuMW 2015
2015-10-28 10:58:06
1.39 MB
Performiniaturization of 4-channel driver with bypass grounding silicon capacitor flip chipped
O. Gaborieau, S. Iochem, L. Lenoir, CSICS 2015
2015-10-28 10:53:08
890.55 KB
Physical Implentation of 3D Integrated Solenoids within Silicon Substrate for Hybrid IC ...
M. Duplessis, O. Tesson, F. Neuilly, J.R. Tenailleau, P. Descamps
2013-07-19 15:18:00
372.31 KB
Power amplifier performances and miniaturization improvement based on Wire Bondable vertical ...
O. Gaborieau, L. Lenoir, European Microwave Week, sept. 2015
2015-09-16 08:37:48
334.50 KB
Silicon Capacitors with extremely high stability and reliability ideal for high temperature ...
C. Bunel, L. Lengignon, HiTEC Conf. 2012
2013-05-15 10:07:11
326.54 KB
Silicon High-Density Capacitors for Power Decoupling Applications
F. Voiron, L. Fourneaud, IWIPP Orlando 2015
2015-10-28 10:46:45
798.73 KB
Silicon interposers with integrated passive devices, an excellent alternative to discrete ...
F. Lallemand, F. Voiron, EMPC, Sept 2013
2013-11-20 16:57:19
991.82 KB
Ultra High Density Capacitors merged with Through Silicon Vias to enhance performances
C. Bunel, F. Voiron, J-R. Tenailleau, Device Packaging 2013
2013-05-15 10:08:06
381.04 KB
Ultra Low Profile Silicon Capacitors (down to 80 µm) applied to Decoupling Applications. ...
L. Lengignon, L. Omnès, F. Voiron
2015-10-28 10:30:27
417.41 KB


Caractérisation par SCM des dopants actifs de la couche intrinsèque d’une diode PIN verticale ...
R. Coq Germanicus, P. Jean, A. Le Grontec, S. Bardy, C. Bunel, JNM, May 2013
2013-11-20 17:19:09
760.26 KB
Copper Electroplating process for passive Si-based System in Package applications
L. Hamelin, S. Ledain...Proceedings BCTM, 2005
2013-05-15 09:33:56
319.64 KB
Full-Wave Analysis of Inhomogeneous Deep-Trench Isolation Patterning for Substrate Coupling ...
S. Wane, D. Bajon. IEEEMTT Journal, December 2006
2015-10-28 11:14:02
2.62 MB
Integrated Passive Devices and TSV, a disruptive technology for miniaturization
C.Bunel, J-R. Tenailleau, F.Voiron, S. Borel, A.Lefevre, IMAPS Orlando, Sept 2013
2014-07-21 14:23:26
594.39 KB
Passive and Heterogeneous Integration Techniques for 3D System-in-Package Applications
Fred Roozeboom, W. Dekkers...12th Annual Pan Pacific Microelectronics Symposium Jan. 30 2007 ...
2009-12-31 13:14:20
0.00 B
Passive and heterogeneous integration towards a Si-based System-in-Package conceptF. Roozeboom ...
H. Kretschman, T. Fric... Thin Solid Films (2006), ICMAT 2005 Conf., July 3-8 2005, Singapore
2013-05-15 09:36:29
985.80 KB
Silicon Based Integrated Capacitors: New Solutions for Combined Miniaturization and High ...
C. Bunel, F. Murray CARTS, April 2014
2015-10-28 11:10:16
256.39 KB
Silicon-Based System-in-Package: Breakthroughs in Miniaturization and ‘Nano’-integration ...
F. Murray, F. LeCornec... Mat. Res. Soc. Symp. Proc, April 19, 2007
2015-10-28 11:14:36
618.17 KB
TSV development, characterization and modeling for 2.5D interposer applications
C. Bunel, JR. Tenailleau , F. Voiron , A.Brunet, S.Borel, ECTC, May 2013
2015-10-28 11:14:45
468.73 KB
Very High Aspect Ratio Deep Reactive Ion Etching of Sub-micrometer Trenches in Silicon
J. Parasuraman, A. Summanwar, F. Marty, P. Basset, ..., 2012
2013-11-20 17:12:07
618.30 KB